Abstract
On approach to decrease dimensions of element "OR"manufactured by using field-effect heterotransistor
Author(s): E.L.Pankratov, E.A.BulaevaIn this paper we introduce an approach to decrease dimensions of logical elements “OR” based on field-effect heterotransistor. The approach based on manufacture the heterostructure with required configuration, diffusion or ion doping of required areas of the heterostructure and optimization of annealing of dopant and/or radiation defects. Several recommendations to optimize annealing both dopant and radiation defects have been formulated.
